TY - GEN
T1 - A framework for accounting for process model uncertainty in statistical static timing analysis
AU - Guo, Yu
AU - Wei, Dong
AU - Zhuo, Feng
AU - Peng, Li
PY - 2007
Y1 - 2007
N2 - In recent years, a large body of statistical static timing analysis and statistical circuit optimization techniques have emerged, providing important avenues to account for the increasing process variations in design. The realization of these statistical methods often demands the availability of statistical process variation models whose accuracy, however, is severely hampered by limitations in test structure design, test time and various sources of inaccuracy inevitably incurred in process characterization. Consequently, it is desired that statistical circuit analysis and optimization can be conducted based upon imprecise statistical variation models. In this paper, we present an efficient importance sampling based optimization framework that can translate the uncertainty in the process models to the uncertainty in parametric yield, thus offering the very much desired statistical best/worst-case circuit analysis capability accounting for unavoidable complexity in process characterization. Unlike the previously proposed statistical learning and probabilistic interval based techniques, our new technique efficiently computes tight bounds of the parametric circuit yields based upon bounds of statistical process model parameters while fully capturing correlation between various process variations. Furthermore, our new technique provides valuable guidance to process characterization. Examples are included to demonstrate the application of our general analysis framework under the context of statistical static timing analysis.
AB - In recent years, a large body of statistical static timing analysis and statistical circuit optimization techniques have emerged, providing important avenues to account for the increasing process variations in design. The realization of these statistical methods often demands the availability of statistical process variation models whose accuracy, however, is severely hampered by limitations in test structure design, test time and various sources of inaccuracy inevitably incurred in process characterization. Consequently, it is desired that statistical circuit analysis and optimization can be conducted based upon imprecise statistical variation models. In this paper, we present an efficient importance sampling based optimization framework that can translate the uncertainty in the process models to the uncertainty in parametric yield, thus offering the very much desired statistical best/worst-case circuit analysis capability accounting for unavoidable complexity in process characterization. Unlike the previously proposed statistical learning and probabilistic interval based techniques, our new technique efficiently computes tight bounds of the parametric circuit yields based upon bounds of statistical process model parameters while fully capturing correlation between various process variations. Furthermore, our new technique provides valuable guidance to process characterization. Examples are included to demonstrate the application of our general analysis framework under the context of statistical static timing analysis.
KW - Importance sampling
KW - SSTA
KW - Yield
UR - http://www.scopus.com/inward/record.url?scp=34547267264&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34547267264&partnerID=8YFLogxK
U2 - 10.1109/DAC.2007.375279
DO - 10.1109/DAC.2007.375279
M3 - Conference contribution
AN - SCOPUS:34547267264
SN - 1595936270
SN - 9781595936271
T3 - Proceedings - Design Automation Conference
SP - 829
EP - 834
BT - 2007 44th ACM/IEEE Design Automation Conference, DAC'07
T2 - 2007 44th ACM/IEEE Design Automation Conference, DAC'07
Y2 - 4 June 2007 through 8 June 2007
ER -