TY - GEN
T1 - A general-purpose FPGA-based reconfigurable platform for video and image processing
AU - Li, Jie
AU - He, Haibo
AU - Man, Hong
AU - Desai, Sachi
PY - 2009
Y1 - 2009
N2 - This paper presents a general-purpose, multi-task, and reconfigurable platform for video and image processing. With the increasing requirements of processing power in many of today's video and image processing applications, it is important to go beyond the software implementation to provide a real-time, low cost, high performance, and scalable hardware platform. In this paper, we propose a system by using the powerful parallel processing architecture in the Field Programmable Gate Array (FPGA) to achieve this objective. Based on the proposed system level architecture and design strategies, a prototype system is developed based on the Xilinx Virtex-II FPGA with the integration of embedded processor, memory control and interface technologies. Our system includes different functional modules, such as edge detection, zoom-in and zoom-out functions, which provides the flexibility of using this system as a general video processing platform according to different application requirements. The final system utilizes about 20% of logic resource, 50% of memory on chip, and has total power consumption around 203 mw.
AB - This paper presents a general-purpose, multi-task, and reconfigurable platform for video and image processing. With the increasing requirements of processing power in many of today's video and image processing applications, it is important to go beyond the software implementation to provide a real-time, low cost, high performance, and scalable hardware platform. In this paper, we propose a system by using the powerful parallel processing architecture in the Field Programmable Gate Array (FPGA) to achieve this objective. Based on the proposed system level architecture and design strategies, a prototype system is developed based on the Xilinx Virtex-II FPGA with the integration of embedded processor, memory control and interface technologies. Our system includes different functional modules, such as edge detection, zoom-in and zoom-out functions, which provides the flexibility of using this system as a general video processing platform according to different application requirements. The final system utilizes about 20% of logic resource, 50% of memory on chip, and has total power consumption around 203 mw.
KW - Edge detection
KW - FPGA design
KW - Image scaling
KW - Reconfigurable system
KW - Video and image processing
UR - http://www.scopus.com/inward/record.url?scp=69849083216&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=69849083216&partnerID=8YFLogxK
U2 - 10.1007/978-3-642-01513-7_32
DO - 10.1007/978-3-642-01513-7_32
M3 - Conference contribution
AN - SCOPUS:69849083216
SN - 3642015123
SN - 9783642015120
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 299
EP - 309
BT - Advances in Neural Networks - ISNN 2009 - 6th International Symposium on Neural Networks, ISNN 2009, Proceedings
T2 - 6th International Symposium on Neural Networks, ISNN 2009
Y2 - 26 May 2009 through 29 May 2009
ER -