Acyclic circuit partitioning for path delay fault emulation

Fatih Kocan, Mehmet H. Gunes

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    Abstract

    Acyclic partitioning of VLSI circuits is studied under area/delay, I-O size and communication constraints. In this paper, we define the path-delay-fault emulation problem which adds a new constraint, viz. path count constraint, to partitioning problem. We present two algorithms to solve the problem. The first algorithm decomposes a circuit into entirely-fanout-free cones, and clusters them into partitions. The second one finds an intermediate partitioning solution with the partitioning algorithm ignoring path count constraint. Later, it applies the first algorithm to the partitions which violate the path count constraint. We implemented the first algorithm and measured its efficiency in terms of the number of resulting partitions, cut-cost, and time cost for ISCAS85 benchmarks.

    Original languageEnglish
    Title of host publication3rd ACS/IEEE International Conference on Computer Systems and Applications, 2005
    Pages22-26
    Number of pages5
    DOIs
    StatePublished - 2005
    Event3rd ACS/IEEE International Conference on Computer Systems and Applications, 2005 - Cairo, Egypt
    Duration: 3 Jan 20056 Jan 2005

    Publication series

    Name3rd ACS/IEEE International Conference on Computer Systems and Applications, 2005
    Volume2005

    Conference

    Conference3rd ACS/IEEE International Conference on Computer Systems and Applications, 2005
    Country/TerritoryEgypt
    CityCairo
    Period3/01/056/01/05

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