TY - GEN
T1 - Combinatorial algorithms for fast clock mesh optimization
AU - Venkataraman, Ganesh
AU - Feng, Zhuo
AU - Hu, Jiang
AU - Li, Peng
PY - 2006
Y1 - 2006
N2 - We present a fast and efficient combinatorial algorithm to simultaneously identify the candidate locations as well as the sizes of the buffers driving a clock mesh. Due to the high redundancy, a mesh architecture offers high tolerance towards variation in the clock skew. However, such a redundancy comes at the expense of mesh wire length and power dissipation. Based on survivable network theory, we formulate the problem to reduce the clock mesh by retaining only those edges that are critical to maintain redundancy. Such a formulation offers designer the option to trade-off between power and tolerance to process variations. Experimental results indicate that our techniques can result in power savings up to 28% with less than 4% delay penalty.
AB - We present a fast and efficient combinatorial algorithm to simultaneously identify the candidate locations as well as the sizes of the buffers driving a clock mesh. Due to the high redundancy, a mesh architecture offers high tolerance towards variation in the clock skew. However, such a redundancy comes at the expense of mesh wire length and power dissipation. Based on survivable network theory, we formulate the problem to reduce the clock mesh by retaining only those edges that are critical to maintain redundancy. Such a formulation offers designer the option to trade-off between power and tolerance to process variations. Experimental results indicate that our techniques can result in power savings up to 28% with less than 4% delay penalty.
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U2 - 10.1109/ICCAD.2006.320175
DO - 10.1109/ICCAD.2006.320175
M3 - Conference contribution
AN - SCOPUS:46149087308
SN - 1595933891
SN - 9781595933898
T3 - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
SP - 563
EP - 567
BT - Proceedings of the 2006 International Conference on Computer-Aided Design, ICCAD
T2 - 2006 International Conference on Computer-Aided Design, ICCAD
Y2 - 5 November 2006 through 9 November 2006
ER -