@inproceedings{f705ea970a324e41b9bb1e84bda403a1,
title = "D-band frequency synthesis using a U-band PLL and frequency tripler in 65nm CMOS technology",
abstract = "This paper presents a digitally controlled frequency synthesizer in 65nm CMOS technology for D-band transceiver applications. The synthesizer uses a low frequency U Band (44-48 GHz) phase-locked loop to track a 50 MHz reference and then employs an injection locked frequency tripler (ILFT) to provide output that can be tuned between 130 and 133 GHz. The proposed D-band synthesizer offers a directly measured phase noise of 82.5 dBc/Hz at 1 MHz offset from the carrier and consumes 92mW of power. The entire syntheszier occupies 0.68mm2 of silicon area.",
author = "Adrian Tang and David Murphy and Gabriel Virbila and Frank Hsiao and Tam, {Sai Wang} and Yu, {Hsing Ting} and Hsieh, {Hsieh Hung} and Jou, {Chewn Pu} and Yanghyo Kim and Alden Wong and Alex Wong and Wu, {Yi Cheng} and Chang, {Mau Chung Frank}",
year = "2012",
doi = "10.1109/MWSYM.2012.6257758",
language = "English",
isbn = "9781467310871",
series = "IEEE MTT-S International Microwave Symposium Digest",
booktitle = "IMS 2012 - 2012 IEEE MTT-S International Microwave Symposium",
note = "2012 IEEE MTT-S International Microwave Symposium, IMS 2012 ; Conference date: 17-06-2012 Through 22-06-2012",
}