DDFS and ΣΔ Approaches for Fractional Frequency Synthesis in Terahertz Instruments

Adrian Tang, Yanghyo Kim, Theodore J. Reck, Goutam Chattopadhyay, Imran Mehdi, Brian J. Drouin, Ken B. Cooper, Nathaniel J. Livesey, Mau Chung Frank Chang

Research output: Contribution to journalArticlepeer-review

15 Scopus citations

Abstract

This paper compares direct digital frequency synthesis (DDFS) and ΣΔ CMOS-based frequency synthesizers for terahertz instrument systems. This paper first discusses the need for fractional synthesis in terahertz systems, and provides a brief overview of reference clock frequency selection, and design choices related to implementation of fractional functionality. ΣΔ-multistage-noise-shape-based and DDFS-based fractional synthesis approaches and architectures are discussed and CMOS synthesizer modules based on both of these approaches are presented. Finally, the paper compares two different 100-GHz CMOS fractional frequency synthesizer chips, which employ the same millimeter-wave circuits but different fractional generators (third- and sixth-order ΣΔ, and DDFS-based). Performance in terms of phase-noise, spurious components, and power consumption are directly compared. Measurements suggest ΣΔ synthesis is more suitable than DDFS for THz fractional synthesizers due to the high-phase multiplication of spurs.

Original languageEnglish
Pages (from-to)410-417
Number of pages8
JournalIEEE Transactions on Terahertz Science and Technology
Volume8
Issue number4
DOIs
StatePublished - Jul 2018

Keywords

  • CMOS
  • fractional synthesizer

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