TY - GEN
T1 - Fabrication and characterization of vertical silicon nanopillar Schottky diodes
AU - Chandra, Nishant
AU - Overvig, Adam C.
AU - Tracy, Clarence J.
AU - Goodnick, Stephen M.
PY - 2012
Y1 - 2012
N2 - The authors report fabrication of vertical Schottky diodes using sub-100nm diameter n-type doped Silicon nanopillars. The nanopillars were fabricated using a top-down approach employing the Bosch process. Square-shaped islands of Silicon dioxide patterned using electron beam lithography and deposited by thermal evaporation acted as hard masks for vertical inductively coupled plasma (ICP) etching. Once formed, the nanopillars were conformally covered in a blanket layer of SiO2 and their tips were exposed using Chemical-Mechanical Polishing. Nickel contacts were patterned and deposited on them using DC magnetron sputtering and were annealed to form Nickel silicide forming Schottky diodes with barrier heights between 0.6 and 0.7 eV. We have thus established a low temperature process (no thermal oxide required) for constructing vertical Silicon Schottky diodes with approximately circular cross-sections of diameters from 40nm to 100nm. The ION to I OFF ratio was at least 104. We also observed non-ideal current-voltage characteristics that differentiate these nanoscale diodes from planar Schottky diodes.
AB - The authors report fabrication of vertical Schottky diodes using sub-100nm diameter n-type doped Silicon nanopillars. The nanopillars were fabricated using a top-down approach employing the Bosch process. Square-shaped islands of Silicon dioxide patterned using electron beam lithography and deposited by thermal evaporation acted as hard masks for vertical inductively coupled plasma (ICP) etching. Once formed, the nanopillars were conformally covered in a blanket layer of SiO2 and their tips were exposed using Chemical-Mechanical Polishing. Nickel contacts were patterned and deposited on them using DC magnetron sputtering and were annealed to form Nickel silicide forming Schottky diodes with barrier heights between 0.6 and 0.7 eV. We have thus established a low temperature process (no thermal oxide required) for constructing vertical Silicon Schottky diodes with approximately circular cross-sections of diameters from 40nm to 100nm. The ION to I OFF ratio was at least 104. We also observed non-ideal current-voltage characteristics that differentiate these nanoscale diodes from planar Schottky diodes.
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U2 - 10.1109/NMDC.2012.6527591
DO - 10.1109/NMDC.2012.6527591
M3 - Conference contribution
AN - SCOPUS:84880110651
SN - 9781467328708
T3 - 2012 IEEE Nanotechnology Materials and Devices Conference, IEEE NMDC 2012
SP - 58
EP - 62
BT - 2012 IEEE Nanotechnology Materials and Devices Conference, IEEE NMDC 2012
T2 - 2012 IEEE Nanotechnology Materials and Devices Conference, IEEE NMDC 2012
Y2 - 16 October 2012 through 19 October 2012
ER -