TY - GEN
T1 - SOME MECHANICS ISSUES RELATED TO THE THERMOMECHANICAL RELIABILITY OF FLIP CHIP DCA WITH UNDERFILL ENCAPSULATION
AU - Le Gall, Carole A.
AU - Qu, Jianmin
AU - McDowell, David L.
N1 - Publisher Copyright:
© 1997 American Society of Mechanical Engineers (ASME). All rights reserved.
PY - 1997
Y1 - 1997
N2 - The objectives of this research were to address some reliability issues in flip chip applications by characterizing the stress and strain response of a flip chip assembly under various loading conditions. In particular, the issue of fundamental limits on chip size was addressed and the importance of appropriate material models and constitutive relationships was assessed. Linear thermoelasticity models, metal plasticity models, viscoelasticity models and creep models were implemented. Finally, parametric studies were performed to optimize some of the elastic properties of the underfill. It has been shown that (1) the chip major dimension is not the limiting factor in determining the maximum chip size for underfilled flip chip interconnections; (2) non-linear material behavior (e.g., creep, viscoplasticity, etc.) and detailed geometry need to be considered in the modeling to accurately predict the stress and strain fields; (3) there is an window for selecting optimal thermal expansion coefficient and modulus values which minimize stress and strain fields in the solder and silicon chip.
AB - The objectives of this research were to address some reliability issues in flip chip applications by characterizing the stress and strain response of a flip chip assembly under various loading conditions. In particular, the issue of fundamental limits on chip size was addressed and the importance of appropriate material models and constitutive relationships was assessed. Linear thermoelasticity models, metal plasticity models, viscoelasticity models and creep models were implemented. Finally, parametric studies were performed to optimize some of the elastic properties of the underfill. It has been shown that (1) the chip major dimension is not the limiting factor in determining the maximum chip size for underfilled flip chip interconnections; (2) non-linear material behavior (e.g., creep, viscoplasticity, etc.) and detailed geometry need to be considered in the modeling to accurately predict the stress and strain fields; (3) there is an window for selecting optimal thermal expansion coefficient and modulus values which minimize stress and strain fields in the solder and silicon chip.
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U2 - 10.1115/IMECE1997-0503
DO - 10.1115/IMECE1997-0503
M3 - Conference contribution
AN - SCOPUS:85126952320
T3 - ASME International Mechanical Engineering Congress and Exposition, Proceedings (IMECE)
SP - 85
EP - 95
BT - Application of Fracture Mechanics in Electronic Packaging
T2 - ASME 1997 International Mechanical Engineering Congress and Exposition, IMECE 1997 - Application of Fracture Mechanics in Electronic Packaging
Y2 - 16 November 1997 through 21 November 1997
ER -