TY - JOUR
T1 - Statistical static timing analysis considering process variation model uncertainty
AU - Yu, Guo
AU - Dong, Wei
AU - Feng, Zhuo
AU - Li, Peng
PY - 2008/10
Y1 - 2008/10
N2 - Increasing variability in modern manufacturing processes makes it important to predict the yields of chip designs at early design stage. In recent years, a number of statistical static timing analysis (SSTA) and statistical circuit optimization techniques have emerged to quickly estimate the design yield and perform robust optimization. These statistical methods often rely on the availability of statistical process variation models whose accuracy, however, is severely hampered by the limitations in test structure design, test time, and various sources of inaccuracy inevitably incurred in process characterization. To consider model characterization inaccuracy, we present an efficient importance sampling based optimization framework that can translate the uncertainty in process models to the uncertainty in circuit performance, thus offering the desired statistical best/worst case circuit analysis capability accounting for the unavoidable complexity in process characterization. Furthermore, our new technique provides valuable guidance to process characterization. Examples are included to demonstrate the application of our general analysis framework under the context of SSTA.
AB - Increasing variability in modern manufacturing processes makes it important to predict the yields of chip designs at early design stage. In recent years, a number of statistical static timing analysis (SSTA) and statistical circuit optimization techniques have emerged to quickly estimate the design yield and perform robust optimization. These statistical methods often rely on the availability of statistical process variation models whose accuracy, however, is severely hampered by the limitations in test structure design, test time, and various sources of inaccuracy inevitably incurred in process characterization. To consider model characterization inaccuracy, we present an efficient importance sampling based optimization framework that can translate the uncertainty in process models to the uncertainty in circuit performance, thus offering the desired statistical best/worst case circuit analysis capability accounting for the unavoidable complexity in process characterization. Furthermore, our new technique provides valuable guidance to process characterization. Examples are included to demonstrate the application of our general analysis framework under the context of SSTA.
KW - Modeling
KW - Optimization
KW - Process variation
UR - http://www.scopus.com/inward/record.url?scp=52649100007&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=52649100007&partnerID=8YFLogxK
U2 - 10.1109/TCAD.2008.2003302
DO - 10.1109/TCAD.2008.2003302
M3 - Article
AN - SCOPUS:52649100007
SN - 0278-0070
VL - 27
SP - 1880
EP - 1890
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IS - 10
M1 - 4627546
ER -