TY - GEN
T1 - TinySPICE
T2 - 50th Annual Design Automation Conference, DAC 2013
AU - Han, Lengfei
AU - Zhao, Xueqian
AU - Feng, Zhuo
PY - 2013
Y1 - 2013
N2 - In nowadays variation-aware IC designs, cell characterizations and SRAMmemory yield analysis require many thousands or even millions of repeated SPICE simulations for relatively small nonlinear circuits. In this work, we present a massively parallel SPICE simulator on GPU, TinySPICE, for efficiently analyzing small nonlinear circuits, such as standard cell designs, SRAMs, etc. In order to gain high accuracy and efficiency, we present GPU-based parametric three-dimensional (3D) LUTs for fast device evaluations. A series of GPU-friendly data structures and algorithm flows have been proposed in TinySPICE to fully utilize the GPU hardware resources, and minimize data communications between the GPU and CPU. Our GPU implementation allows for a large number of small circuit simulations in GPU's shared memory that involves novel circuit linearization and matrix solution techniques, and eliminates most of the GPU device memory accesses during the Newton-Raphson (NR) iterations, which enables extremely high-throughput SPICE simulations on GPU. Compared with CPU-based TinySPICE simulator, GPU-based TinySPICE achieves up to 138X speedups for parametric SRAM yield analysis without loss of accuracy.
AB - In nowadays variation-aware IC designs, cell characterizations and SRAMmemory yield analysis require many thousands or even millions of repeated SPICE simulations for relatively small nonlinear circuits. In this work, we present a massively parallel SPICE simulator on GPU, TinySPICE, for efficiently analyzing small nonlinear circuits, such as standard cell designs, SRAMs, etc. In order to gain high accuracy and efficiency, we present GPU-based parametric three-dimensional (3D) LUTs for fast device evaluations. A series of GPU-friendly data structures and algorithm flows have been proposed in TinySPICE to fully utilize the GPU hardware resources, and minimize data communications between the GPU and CPU. Our GPU implementation allows for a large number of small circuit simulations in GPU's shared memory that involves novel circuit linearization and matrix solution techniques, and eliminates most of the GPU device memory accesses during the Newton-Raphson (NR) iterations, which enables extremely high-throughput SPICE simulations on GPU. Compared with CPU-based TinySPICE simulator, GPU-based TinySPICE achieves up to 138X speedups for parametric SRAM yield analysis without loss of accuracy.
KW - GPU computing
KW - SPICE simulation
KW - Variation-aware analysis
UR - http://www.scopus.com/inward/record.url?scp=84879860144&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84879860144&partnerID=8YFLogxK
U2 - 10.1145/2463209.2488843
DO - 10.1145/2463209.2488843
M3 - Conference contribution
AN - SCOPUS:84879860144
SN - 9781450320719
T3 - Proceedings - Design Automation Conference
BT - Proceedings of the 50th Annual Design Automation Conference, DAC 2013
Y2 - 29 May 2013 through 7 June 2013
ER -